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Deep Learning on low-power Lattice iCE40 UltraPlus FPGAs

Programmable deep learning system for computer vision using less than 5 milliWatts of power

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Reduce Design Time

Reduces development time and cost by 50% to 90%

  • Easy to integrate
  • Scalable pre-verified core for HW
  • Code algorithms in SW – C/C++
  • Accelerates time to market
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Supercomputer Performance

Dramatically enhance your current FPGA designs

  • Increase performance from 100x to 1000x for many application kernels
  • Supercomputer performance in cost effective FPGAs
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Innovate your Applications

Add real time functions to your product on the fly

  • Flexible
  • Change applications indefinitely without affecting HW
  • Scalable for any size FPGA – scales from V1 to V128
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Introducing the MXP™ Matrix Processor

The world’s first embedded supercomputer delivered as an IP Core and completely programmable in C/C++

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