The MXP™ Processor was developed with 3 basic principles in mind.

Performance

Deliver the world’s first embedded super computer…Period

Design Flow

Change the way you think and act about embedded HW design with a true SW based methodology

Time to Market

Focus on faster more flexible design cycles, that get product to market quicker, with more flexibility.

True Parallel Processing in an FPGA

Supercomputer to FGPAThe VectorBlox MXP™ matrix processor is an extremely high-performance processor capable of speedups in excess of 1000x faster than current embedded FPGA processors. The design of the processor was inspired by the vector processors used in scientific supercomputers made by Cray, Fujitsu and NEC.

However, the MXP™ is not a simple clone of one of these processors. It has been redesigned from the ground up to perform well on embedded applications which operate primarily on various integer widths and fixed-point data types.

It has also been designed from the start to map exceptionally well into modern FPGAs in a way that exploits their hard RAM blocks and hard multiplier or DSP blocks.

The VectorBlox MXP™ matrix processor is an update on the classic vector processor. Instead of operating merely on vectors, MXP™ can also operate on 2D and 3D matrices. It performs parallel calculations directly on sets of data stored directly in a private scratchpad memory.

To achieve speedups in excess of 1000x, the VectorBlox MXP™ employs several strategies to maximize parallelism and to reduce overhead such as address calculations. This ensures the parallel ALUs employed by the MXP™ are working to their full potential on actual data calculations.

The parallelism available in MXP™ exceeds that of traditional scalar CPUs, fixed-width SIMD operations, and even variable-length vector CPUs.

To find out more please sign up for an evaluation here.

Evolved Design and Development

Companies traditionally design embedded computing devices using a difficult, time-consuming and costly hardware approach. Scarce, highly-specialized and expensive hardware design engineers work laboriously for 6 to 12 months developing custom hardware algorithms. This has been the only practical method as embedded computing devices require high-performance and low-power consumption in a small package. These devices are often designed with custom hardware implemented in commercially available off-the-shelf reconfigurable computer chips such as FPGAs (field-programmable gate-arrays).

VectorBlox is changing the paradigm of embedded design by offering a hybrid hardware-software solution that reduces development time and cost by 50% to 90%. Our customers still achieve high-performance and low-power consumption, but simply do it quicker. They simply integrate our pre-verified processor IP into an FPGA; relatively inexpensive software programmers then easily write software algorithms for our processor in just 1 to 3 months. We thus accelerate the development process, creating new leadership opportunities for our customers in emerging new technologies such as embedded vision devices – “machines that see.”

Evolved Design and Development Diagram

Traditional Design Flow… vs MXP flow

Typical Hardware Design Flow

Typical Hardware Design Flow Diagram

Design Flow using MXP Matrix Processor

Design Flow using MXP Matrix Processor Diagram